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Indian Institute of Technology Bhubaneswar
Indian Institute of Technology Bhubaneswar

Dr. Debiprasanna Sahoo Assistant Professor
School of Electrical Sciences

Research Interests

Computer Architecture
High Performance Computing and Data Centre Architecture
Internet of Things and TinyML
Micro-architecture Verification

Contact Details

  • A306, School of Electrical Sciences
  • dpsahoo@iitbbs.ac.in, debiprasanna.sahoo@ieee.org

Other Profile Link(s)

Education

 Degree Discipline Year School
  B. Tech. Computer Science and Engineering 2009 College of Engineering and Technology Bhubaneswar
  M. Tech. Computer Science and Engineering 2013 Indian Institute of Technology Madras
  Ph.D. Computer Science and Engineering 2019 Indian Institute of Technology Bhubaneswar
 

Biosketch

debiprasanna.in
please visit my website if you are interested in any kind collaboration

Teaching

 Computer Architecture and Microprocessors, Autumn 2022 and Autumn 2023, @ IIT Roorkee 
Advanced Computer Architecture, Spring 2022 and Spring 2023 @ IIT Roorkee
Network Programming, Autumn 2021 @ IIT Roorkee 
 
Cloud Computing, Spring 2024, IIT Bhubaneswar 

Projects

Breaking the Memory Wall of High Performance Computing: Design and Analysis of 3D Stacked Cache, SERB SRG, Jan 2024-Dec 2025 (Rs. 33L)
 
Accelerating NLP Applications in Federated Learning Framework for Mobile SOC, Qualcomm, Sep 2023-Aug 2025 (Rs. 20L)
 
Modeling, Analysis and Verification of 3D Stacked Caches, Seed Grant, IIT Roorkee, Completed (Rs. 20L)

Recent Publications (International Journals)

1Formal Modeling and Verification of Security Properties of a Ransomware-Resistant SSD, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Vol-42(8), 2022 Shivani Tripathy, Debiprasanna Sahoo, Manoranjan Satpathy, and Madhu Mutyam
2Formal Modeling and Verification of a Victim DRAM Cache, ACM Transactions on Design Automation of Electronic Systems (TODAES), Vol-24(2), 2019 Debiprasanna Sahoo, Swaraj Sha, Manoranjan Satpathy, Madhu Mutyam, S. Ramesh, Partha Roop
3ReDRAM: A Reconfigurable DRAM Cache for GPGPUs, IEEE Computer Architecture Letter (CAL), vol-17, issue-2, 2018 Debiprasanna Sahoo, Swaraj Sha, Manoranjan Satpathy, Madhu Mutyam
4Formal Modeling and Verification of Controllers for a Family of DRAM Caches, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol-37, issue-11, 2018 Debiprasanna Sahoo, Swaraj Sha, Manoranjan Satpathy, Madhu Mutyam, S. Ramesh, Partha Roop

Conferences (International)

1Predicting Memory Access Latency using Machine Learning, AMD Global Technology Conference, 2021 Shivam Potdar, Vanchinathan Venkataramani, Scot Weber, Monica Farkash, Debiprasanna Sahoo, GS Nitesh Narayana, Surya Teja Parisa
2Slumber: Static Power Management for GPGPU Register Files, 25th, International Symposium on Low Power Electronics and Design, ACM, 2020 Devashree Tripathy, H.Z. Sabzi, Debiprasanna Sahoo, Manoranjan Satpathy, Laxmi Narayan Bhuyan
3Fuzzy Fairness Controller for NVMe SSDs, 34th, International Conference on Supercomputing (ICS), IEEE, 2020 Shivani Tripathy, Debiprasanna Sahoo, Manoranjan Satpathy, Madhu Mutyam
4Post-Model Validation of Victim DRAM Caches, 37th, International Conference on Computer Design (ICCD), IEEE, 2019 Debiprasanna Sahoo, Shivani Tripathy, Manoranjan Satpathy, Madhu Mutyam
5Formal Modeling and Verification of of NAND Flash Memory, 37th, International Conference on Computer Design (ICCD), IEEE, 2019 Shivani Tripathy, Debiprasanna Sahoo, Manoranjan Satpathy, Srinivas Pinisetty
6Multidimensional Grid Aware Address Prediction for GPGPU, 32nd, International Conference on VLSI Design (VLSID), IEEE, 2019 Shivani Tripathy, Debiprasanna Sahoo, Manoranjan Satpathy
7CAMO: A Novel Cache Management Organization for GPGPUs, 23rd, Asia and South Pacific Design Automation Conference (ASP-DAC), ACM, 2018 Debiprasanna Sahoo, Swaraj Sha, Manoranjan Satpathy, Madhu Mutyam, Laxmi Narayan Bhuyan
8Locking Lines in Tag Cache to Improve Access Optimization for DRAM Caches, International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES), ESWEEK, IEEE, 2018 Shivani Tripathy, Debiprasanna Sahoo, Manoranjan Satpathy
9An Experimental Study on Dynamic Bank Partitioning of DRAM in Chip Multiprocessors, 30th, International Conference on VLSI Design (VLSID), IEEE, 2017 Debiprasanna Sahoo, Manoranjan Satpathy, Madhu Mutyam
10MSimDRAM: Formal Model Driven Development of DRAM Simulator, 29th, International Conference on VLSI Design (VLSID), IEEE, 2016 Debiprasanna Sahoo, Manoranjan Satpathy
 

Academic Honors & Awards

  • Advisor for Qualcomm Innovation Fellowship Winner @ IIT Roorkee
  • Advisor for Winners of CSAW @ IIT Roorkee
  • Spotlight Award, Advanced Micro Devices (AMD)
  • Best Poster Award, ASP-DAC, South Korea
  • Best Poster Award (3rd Prize), IIT Bhubaneswar
  • Best Teaching Assistant IIT Madras
  • All Odisha Programming Marathon Winner
 

Research Scholar

Yash Singhal @ IIT Roorkee
Praveen @ IIT Bhubaneswar 
 

Professional Experience

Assistant Professor for 2.5 years @ IIT Roorkee   MTS Silicon Design Engineer for 2.5 years @ Advanced Micro Devices (AMD)

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Registrar

Address :Indian Institute of Technology Bhubaneswar
Argul, Khordha
PIN - 752050, ODISHA
Phone: +91 674 7134550, +91 674 7134551
Email: registrar@iitbbs.ac.in

Office of the Registrar

Address :Indian Institute of Technology Bhubaneswar
Argul, Khordha
PIN - 752050, ODISHA
Phone: +91 674 7134560, +91 674 7134561
Email: registrar.office@iitbbs.ac.in

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